NAND flash memories that have two or three bits per cell may suffer from program disturb (PD) and single bit cell leakage (SBCL). In a three-bit-per-cell NAND flash memory, PD may cause a level 0 written to a NAND flash cell to gain charge if neighboring cells are charged to a higher level, for example, level 7, which may cause the bit to be read out as a level 1 (or even a higher level). SBCL happens when charge leaks from a higher level, for example, a level 7 to result in the bit being read out as a lower level. Both PD and SBCL can cause a bit 1 to be readout as bit 1 for the upper page. This impairment is referred to as long tails due to PD and SBCL.
For NAND flash memories with Low-Density Parity Check (LDPC) encoded data, when data is read out of the upper page, a 0 may not be as reliable as for single-bit cells because the 0 may be the result of misplacement. Misplacement occurs when the lower page read-out is in error while programming a middle page, or a middle page read has errors while programming the upper page, for a three bit per cell NAND flash memory. Misplacements cause NAND flash memories to not be as reliable as necessary for some applications.